View LA6543M_144550.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Ordering number : EN5904
LA6543M
Monolithic Linear IC
LA6543M
4-Channel Bridge (BTL) Driver for CD-ROM
Overview
The LA6543M is a 4-channel bridge (BTL) driver developed for CD-ROM applications.
Package Dimensions
unit: mm 3129-MFP36SLF
[LA6543M]
36 19
Functions
* 4-channel power amplifier with bridge circuit (BTL) * IO max: 1A * Integrated muting circuit (MUTE: Output OFF at Low, output ON at High. MUTE1 is for channel 1, and MUTE2 for channels 2, 3 and 4.) * Integrated thermal shutdown circuit * Divided output stage power supply (VS1: CH1, CH2, CH3; VS2: CH4)
15.3
0.4
0.8
0.85
0.1
Specifications
Maximum Ratings at Ta = 25C
Parameter Maximum supply voltage 1 Maximum supply voltage 2 Input voltage Mute pin voltage Allowable power dissipation Symbol Conditions Ratings 14 Unit V V V V W W C C
VCCmax VSmax VINmax VMUTEmax
Pd max IC only Specified substrate Note 1
VS1, 2
Input pins VIN1 to 4
2.25 2.5max
SANYO : MFP36SLF
14 13 13 0.9 2.1 - 20 to +75 - 55 to +150
Operating temperature Storage temperature
Topr Tstg
Note 1: Specified substrate 76.1 x 114.3 x 1.6 (t)mm, glass exposy
Operating Conditions at Ta = 25C
Parameter Recommended operation voltage 1 Recommended operation voltage 2-1 Recommended operation voltage 2-2 Symbol Conditions Ratings 4 to 13 Unit V V V
VCC VS1 VS2 VS1: CH1 to CH3 VS2: CH4 output reference power supply
4 to 13 4 to 13
*VCC > VS1, 2
Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.
SANYO Electric Co., Ltd. Semiconductor Business Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
N1798RM(KI) No. 5904-1/7
0.65
1
18
0.25
9.2 10.5
7.9
LA6543M
Electrical Characteristics at VCC = 12V, VS = 5V, Ta = 25C
Parameter
VCC no-load current drain
Symbol
ICC 1 ICC2
Conditions min All outputs ON (MUTE1, MUTE2: High) All outputs OFF (MUTE1, MUTE2: Low) CH1 - CH2 ON (MUTE1, MUTE2: High) CH1 - CH2 OFF (MUTE1, MUTE2: Low) CH3 - CH4 ON (MUTE1, MUTE2: High) CH3 - CH4 OFF (MUTE1, MUTE2: Low) Potential difference between plus and minus outputs for CH1 to CH4
Input voltage range for VIN1 to VIN4
Ratings typ 5 10 5 20 max 20 10 30 4 5 10 4 -50 0.5 4.4 4.7 +50 5 Unit mA mA mA mA mA mA mV V V
VS1 no-load current drain
IS1-1 IS1-2
VS2 no-load current drain
IS2-1 IS2-2
Output offset voltage Input voltage range Output voltage (source)
VOF1 to 4 VIN
Vsource Plus and minus outputs at high level
I O = 700 mA
(sink)
Vsink
Plus and minus outputs at low level
I O = 700 mA
0.3
0.6
V
Closed circuit voltage gain
VG1 VG2
Voltage gain between CH1 to CH3 BTL amplifiers Voltage gain between CH4 BTL amplifiers (Note 1) MUTE1, MUTE2 voltage when output is ON (Note 2) MUTE1, MUTE2 current when output is ON (Note 2)
7 14 0.5 1.5 6 2 10
dB dB V/s V A
Slew rate Mute ON voltage Mute ON current
SR
VMUTE IMUTE
Note 1: Guaranteed design value Note 2: MUTE turns amplifier output ON at High and OFF at Low. (Output impedance becomes high.) This applies to MUTE1 and MUTE2.
Allowable power dissipation, Pd max - mW
2.4
Pd max - Ta
With substrate
2.1
2.0
1.6
1.2
IC only
0.8
0.9
0.4
0 -20
0
20
40
60
75 80
100
Ambient temperature, Ta - C
No. 5904-2/7
LA6543M Pin Assignment
RF RF NC VSS2 VSS2-OUT MUTE1 VIN1 VG1 VIN2
1 2 3 4 5 6 7 8 9
36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19
RF RF VSS1 VSS1-OUT VO1 VO2 VS1 VO3 VO4 VO5 VO6 VS2 VO7 VO8 VREF OUT VREF IN RF RF
LA6543M
VG2 10 VIN3 11 VG3 12 VIN4 13 VG4 14 MUTE2 15 VCC 16 RF 17 RF 18
Top view
A11323
No. 5904-3/7
LA6543M Pin Function
Pin number 1, 2 17, 18 19, 20 35, 36 7 9 11 13 8 10 12 14 16 22
V IN1 V IN2 V IN3 V IN4
11 9 VIN 13 7 11k 12 8 VG 14 10
Pin name
Equivalent circuit
Pin function
RF
VCC 16
Substrate (minimum potential)
Input pin for CH1 Input pin for CH2 Input pin for CH3 Input pin for CH4 Input pin for CH1 (gain adjustment) Input pin for CH2 (gain adjustment)
A GND VREF OUT 22 1 2 17 18 19 20 35 36
A10991
Drive
VG1 VG2 VG3 VG4
V CC V REFOUT
Input pin for CH3 (gain adjustment) Input pin for CH4 (gain adjustment) Power supply Level shift circuit reference voltage
(V REF1 buffer amplifier output)
3 4 5 6 15
NC
V SS 2 V SS 2-OUT
May not be used. Connect to V S 2 Output stage reference voltage output
(V S 2-V BE)/2: typ)
MUTE1 MUTE2
16
VCC
CH1 output ON/OFF CH2 to CH4 output ON/OFF
6 15
MUTE1,2
To bias circuit
1 2 17 18 19 20 35 36
A10993
21 23 24 26 27 28 29 31 32 25 30 33 34
V REFIN V O8 V O7 V O6
Drive
Level shift circuit reference voltage input
(V REF1 buffer amplifier input)
VCC 16
CH4 inverted output (AMP8 output) CH4 non-inverted output (AMP7 output) CH3 inverted output (AMP6 output) CH3 non-inverted output (AMP5 output) CH2 inverted output (AMP4 output) CH2 non-inverted output (AMP3 output)
V O5 V O4 V O3 V O2 V O1
28 29 31 32
23 VO 24 26 27
1 2 17 18 19 20 35 36
A10992
CH1 inverted output (AMP2 output) CH1 non-inverted output (AMP1 output) CH3 (AMP5, AMP6), CH4 (AMP7, AMP8) output stage power supply CH1 (AMP1, AMP2), CH2 (AMP3, AMP4) output stage power supply Output stage reference voltage (V SS1/2:typ)
(V REF2 buffer amplifier input)
VS2 VS1
V SS 1-OUT
V SS 1
Connect to VS1 (resistance split to generate
V SS1-OUT)
No. 5904-4/7
LA6543M Block Diagram
RF RF NC VSS2 VSS2-OUT MUTE1 VIN1 VG1 VIN2
1 2 3 4 5 6 7 8 9
VO1 to VO2
- +
Thermal shutdown
MUTE1
CH1(VO1-VO2)
- +
36 RF
CH2(VO3-VO4) CH3(VO5-VO6) CH4(VO7-VO8)
MUTE2
35 RF 34 VSS1 33 VSS1-OUT
- + - +
32 VO1 31 VO2 30 VS1
Level shift
- + - + - + - +
29 VO3 28 VO4 27 VO5 26 VO6 25 VS2
Level shift
VG2 10 VIN3 11 VG3 12 VIN4 13 VG4 14 MUTE2 15 VCC 16 RF 17 RF 18
VO3 to VO8
- +
System Diagram (relationship between power supply and MUTE)
Level shift
Level shift
- + - +
24 VO7 23 VO8 22 VREF OUT 21 VREF IN 20 RF 19 RF
A10994
MUTE1
CH1
CH2
VS1
MUTE2
CH3
CH4
VS2
A10995
No. 5904-5/7
LA6543M Sample Application Circuit
VS(5V)
1 2 3 4 5 6 Loading input 7 8 Gain setting Focus input 9 10 Gain setting Tracking input 11 12 Gain setting Sled input 13 14 Gain setting 15 VCC (12V) 16 17 18
RF RF (NC) VSS2 VSS2-OUT MUTE1 VIN1 VG1 VIN2 VG2 VIN3 VG3 VIN4 VG4 MUTE2 VCC RF RF
RF 36 RF 35 VSS1 34 VSS1-OUT 33 VO1 32 M VO2 31 VS1 30 VO3 29 Focus VO4 28 VO5 27 Tracking VO6 26 VS2 25 VO7 24 M VO8 23 VREF OUT 22 VREF IN 21 RF 20 RF 19 Reference voltage Sled Loading
LA6543M
A10996
No. 5904-6/7
LA6543M Gain Setting (input pins and adjustment pins)
A simplified diagram of VIN and VG is shown below. 1) Consider an 11 k (typ.) inserted between VIN and VG. 2) When only VIN and not VG is used, the BTL gain (between VO+ and VO-) is set to 6 dB (0 dB for AMP only). This also applies for the case when VIN is not used and an 11 k external resistor is connected to VG for input. 3) Gain is set by the input impedance as seen from point A. When VG only is used and the external resistor is R, the BTL gain (between VO+ and VO-) is 20 log (11 k/R) + 6 dB. When an 11 k resistor is inserted between VIN and VG, and input is via VIN, the combined resistance Rz as seen from point A is Rz = 5.5 k. Gain is 20 log (11 k/5.5 k) + 6 dB = 12 dB.
VG VIN 11 k Level shift - AMP1 + VO+
VREF VSS
- VREF1 +
A
- AMP2 + VO-
CH4 only
11 k
- VREF2 +
11 k GND
A10997
Offset Voltage
This IC incorporates a level shifter circuit. The input references the voltage VREF to be applied and references the voltage (VSS - VBE (0.7))/2V to be output.
Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products(including technical data,services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only ; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.
This catalog provides information as of December, 1998. Specifications and information herein are subject to change without notice. PS No. 5904-7/7

▲Up To Search▲

Price & Availability of LA6543M

	To Download LA6543M Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .